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Principal Algorithm Developer -Implementation L1

Unlock employer Abu Dhabi, United Arab Emirates Direct to Company Under an hour ago · 07 Oct 2026

Financial

  • Estimate: $80k - $150k*
  • Zero income tax location

Accessibility

  • Office Only
  • Visa Provided

Requirements

  • Experience: Senior
  • English: Professional

Position

About the Role
This position involves designing, simulating, and validating waveform algorithms essential for advancing wireless communication technologies. The successful candidate will work on modulation and demodulation, error correction, equalization, synchronization, and frequency offset correction for both single- and multi-carrier systems. The role also includes researching advanced signal processing techniques to enhance efficiency, robustness, and error resilience. Performance testing across various channel models—such as fading, noise, and interference—will be conducted using MATLAB, Simulink, or Python. Additionally, the position requires optimizing algorithms for real-time hardware implementations, specifically FPGA and DSP, while collaborating with cross-functional teams for modem integration, design reviews, and stakeholder reporting.

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Key Responsibilities

  • Design, simulate and validate waveform algorithms for single- and multi-carrier systems.
  • Research advanced signal processing techniques for greater efficiency and robustness.
  • Test performance across channel models using MATLAB, Simulink, or Python.
  • Optimize algorithms for real-time hardware implementation (FPGA/DSP).
  • Collaborate cross-functionally on modem integration and conduct design reviews.

Education and Minimum Qualification

  • 12+ years of experience developing algorithms for wireless communication modems (e.g., 5G, WiFi, WiMax).
  • Hands-on waveform optimization experience with a strong understanding of communications standards and protocols.
  • A Master's degree in Electrical Engineering, Telecommunications, Computer Science, or a related field (PhD preferred).

Key Skills

  • Proficiency in MATLAB/Simulink and C++/Python, with exposure to FPGA/ASIC hardware implementation.
  • A robust grounding in channel modeling and performance metrics, including BER, SNR, and throughput.
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